Power-Aware Computing

A Kernel-Directed Compiler-Assisted Dynamic Voltage Scaling algorithm

Diplomarbeit im Fach Informatik


Energy consumption of modern computing devices is becoming an increasingly important topic, especially for battery-powered mobile devices, as the development of battery capacity could not keep the pace of the development of processor performance and power consumption over the last 10 years. One famous technique that can be used to save energy is a combination of dynamic frequency scaling (DFS) and dynamic voltage scaling (DVS). So far, many different DVS algorithms have been proposed, almost all of which have in common that they are located either completely inside the operating system kernel or on the application side, i.e. either in the compiler or in the application itself. This study presents a compiler-kernel cooperation, a kernel-directed compiler-assisted dynamic voltage scaling algorithm.

Implementing the DVS algorithm inside the kernel allows to react to different applications running simultaneously, each having different optimal operating frequencies. A compiler-only algorithm could not achieve this. Modifying the compiler so that is assists the kernel in determining the optimal frequency lets the algorithm predict application behavior, which enables it to act before changes take place rather than just react to them. The kernel alone would not be able to do this.

Experiments conducted on an evaluation board, based on the Intel XScale PXA architecture, have shown that the kernel-only DVS algorithm achieves energy savings of up to 21% at a slowdown of 14% and savings of up to 25% at a slowdown of 19% for homogenous applications with low cache efficiency. For applications with high cache efficiency, savings between 4% (11% slowdown) and 11% (22% slowdown) can be accomplished. Experiments involving programs compiled by our compiler have not lead to any improvement compared with the kernel-only algorithm for homogenous applications. For artificial, heteregenous applications with different sections of different cache efficiency, energy savings could by increased from 16.5% to 18% by adding compiler support. We do, however, not consider these applications realistic.

The claim that any kernel-only DVS algorithm is essentially inert and second to a compiler-based approach because of its inabiliy to predict application behavior seems unsubstantiated, at least with respect to the XScale PXA architecture examined in this study. An adaptive kernel algorithm is able to react to changes in application behavior within a few system ticks. A compiler-directed DVS algorithm could not be much faster because the flexibility is restricted by the voltage scaling latency of the system, which only allows few frequency/voltage changes per second.

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